A Flexible High-Bandwidth Low-Latency Multi-Port Memory Controller

نویسندگان

  • Xuan-Thuan Nguyen
  • Trong-Tu Bui
  • Huu-Thuan Huynh
  • Duc-Hung Le
  • Cong-Kha Pham
چکیده

Multi-port memory controllers (MPMCs) have become increasingly important in many modern applications due to the tremendous growth in bandwidth requirement. Many approaches so far have focused on improving either the memory access latency or the bandwidth utilization for specific applications. Moreover, the application systems are likely to require certain adjustments to connect with an MPMC, since the MPMC interface is limited to a single-clock and singledata-width domain. In this paper, we propose efficient techniques to improve the flexibility, latency, and bandwidth of an MPMC. Firstly, MPMC interfaces employ a pair of dual-clock dual-port FIFOs at each port, so any multi-clock multi-data-width application system can connect to an MPMC without requiring extra resources. Secondly, memory access latency is significantly reduced because parallel FIFOs temporarily keep the data transfer between the application system and memory. Lastly, a proposed arbitration scheme, namely window-based first-come-first-serve, considerably enhances the bandwidth utilization. Depending on the applications, MPMC can be properly configured by updating several internal configuration registers. The experimental results in an Altera Cyclone V FPGA prove that MPMC is fully operational at 150 MHz and supports up to 32 concurrent connections at various clocks and data widths. More significantly, achieved bandwidth utilization is approximately 93.2% of the theoretical bandwidth, and the access latency is minimized as compared to previous designs.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Washington University ’ s Gigabit ATM Desk Area Network †

We present the design of an ATM-based interconnect that serves as a high speed packet-switched equivalent of an I/O bus in a workstation/server. By effectively “extending” an external ATM network into the desk-area, the interconnect also serves as a high performance host-network adapter. An OC-12c (622 Mbps) prototype of the interface is being built at Washington University as part of an ARPA-s...

متن کامل

Design of the 21174 Memory Controller for DIGITAL Personal Workstations

Vol. 9 No. 2 1997 57 As microprocessor performance has relentlessly improved in recent years, it has become increasingly important to provide a high-bandwidth, low-latency memory subsystem to achieve the full performance potential of these processors. In past years, improvements in memory latency and bandwidth have not kept pace with reductions in instruction execution time. Caches have been us...

متن کامل

X A Real-Time Multi-Channel Memory Controller and Optimal Mapping of Memory Clients to Memory Channels

Ever increasing demands for main memory bandwidth and memory speed/power trade-off led to the introduction of memories with multiple memory channels, such as Wide IO DRAM. Efficient utilization of a multi-channel memory as a shared resource in multi-processor real-time systems depends on mapping of the memory clients to the memory channels according to their requirements on latency, bandwidth, ...

متن کامل

The Effects of Latency, Occupancy, and Bandwidth in Distributed Shared Memory Multiprocessors

Distributed shared memory (DSM) machines can be characterized by four parameters, based on a slightly modified version of the logP model. The l (latency) and o (occupancy of the communication controller) parameters are the keys to performance in these machines, and are largely determined by major architectural decisions about the aggressiveness and customization of the node and network. For rec...

متن کامل

Ultra-high performance communication with MPI and the Sun fireTM link interconnect

We present a new low-latency system area network that provides the ultra-high bandwidth needed to fuse a collection of large SMP servers into a capability cluster. The network adapter exports a remote shared memory (RSM) model that supports low latency kernel bypass messaging. The SunTM MPI library uses the RSM interface to implement a highly efficient memory-to-memory messaging protocol in whi...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:
  • CoRR

دوره abs/1712.03477  شماره 

صفحات  -

تاریخ انتشار 2017